The present invention relates to a method for fabricating a semiconductor memory exemplified by a DRAM (dynamic random access memory), and more specifically to a method for forming a capacitor in the semiconductor memory.
With an increased integration density of the semiconductor memory exemplified by a DRAM, it is actively researched to form a capacitor insulating film of a high dielectric constant insulating material typified by (Ba, Sr)TiO.sub.3, in place of a silicon oxide and a silicon nitride.
Referring to FIGS. 1A to 1C, there are shown diagrammatic sectional views for illustrating a process for forming a capacitor having a high dielectric constant insulating film in a semiconductor memory.
FIG. 1A shows a condition that a lower electrode 103 is formed on an interlayer insulator film 102 at a position of a capacitor contact 101 formed to penetrate through the interlayer insulator film 102. This lower electrode 103 can he formed by depositing a multilayer metal film formed of Ti, TiN and Ru on the interlayer insulator film 102 by a sputtering, and by patterning the multilayer metal film into a desired shape by a dry etching using a patterned photoresist mask.
As shown in FIG. 1B, a high dielectric constant insulating film 104 of (Ba, Sr)TiO.sub.3 is formed to cover the whole surface by a MO-CVD (metal organic chemical vapor deposition) process, and an upper electrode 105 of Ru (ruthenium) is formed on the high dielectric constant insulating film 104 by a sputtering.
Thereafter, as shown in FIG. 1C, an interlayer insulator film 106 is formed to cover the whole surface by a CVD process, so that an interconnection will he formed on the interlayer insulator film 106.
In the above mentioned example, if the interlayer insulator film 106 is formed of a NSG (non-doped silicate glass) film which is formed by a CVD process using TEOS (tetraethoxysilane) as a starting material, the interlayer insulator film 106 becomes uneven over the whole surface, as shown in FIG. 1C. The cause for this is considered that the NSG film formed by the CVD process using the TEOS as the starting material is apt to be influenced by crystallinity and hydration of an underlying layer, with the result that if the crystallinity and the hydration of the underlying layer is not satisfactory, it is difficult to form an uniform NSG film. In addition, in a stepped structure created by the patterned lower electrode 103 as shown in FIG. 1B, it is difficult to control a crystallographic axis at an upper surface and at a side surface of the electrode (because an orientation axis of a deposited film becomes perpendicular to the substrate and therefore the crystallographic axis at the upper surface of the electrode becomes perpendicular to the crystallographic axis at the side surface of the electrode), with the result that the grown NSG film has an irregular film thickness over the whole surface.